International patent application number W097/38372 (the contents of which are incorporated herein by reference) describes a system for processing multiple real time data sources through a multi-threaded media processing core. The processing core handles a number of execution of instructions. A determination is made as to which thread has the highest priority for execution and execution is formed on that thread in accordance with this.
International patent application number WO02/06716 entitled to control a priority lead structure on a multi-threaded processor (the contents of which are incorporated herein by reference) elaborates further on the arbitration schemes which are possible between different executing threads. It provides a method apparatus for controlling execution rates for instruction threads. The rate at which instructions are to be executed is stored and requests are issued to cause instruction to execute in response to the stored rate. The stored rate is reduced in response to execution of instructions and increased in the absence of instructions for execution. Furthermore, instruction rate is controlled by storing the average rate at which each thread should execute instructions. A value representing the number of instructions available not yet issued is monitored and decreased in response to instruction execution. Also, a ranking order can be assigned to a plurality of instruction threads using a plurality of metrics relating to the threads.
In a further development, a technique known as ‘Enhanced interleaved multi-threading’ works by maintaining a superset of execution threads from which a subset is maintained a active. The number of active threads is determined by the latency of the execution unit to which they are issuing instructions. Threads are then swapped between the active subset and the superset based on resource dependencies, i.e., if an active thread is waiting or the data to be returned in memory it will be swapped for a currently inactive one that is ready to proceed.